SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
IBM Corporation
IBM eServer pSeries 690 Turbo
SPECint2000 = 814    
SPECint_base2000 = 790    
SPEC license # 11 Tested by: IBM, Austin, TX Test date: Nov-2001 Hardware Avail: Dec-2001 Software Avail: Dec-2001
Benchmark Reference
Time		 Base
Runtime		 Base
Ratio		 Runtime Ratio Graph Scale
164.gzip 1400 249    563     244    574     164.gzip base result bar (563)
164.gzip peak result bar (574)
175.vpr 1400 195    718     189    742     175.vpr base result bar (718)
175.vpr peak result bar (742)
176.gcc 1100 140    788     140    788     176.gcc base result bar (788)
176.gcc peak result bar (788)
181.mcf 1800 166    1087      159    1131      181.mcf base result bar (1087)
181.mcf peak result bar (1131)
186.crafty 1000 149    673     116    863     186.crafty base result bar (673)
186.crafty peak result bar (863)
197.parser 1800 405    445     397    453     197.parser base result bar (445)
197.parser peak result bar (453)
252.eon 1300 132    985     132    985     252.eon base result bar (985)
252.eon peak result bar (985)
253.perlbmk 1800 259    694     259    694     253.perlbmk base result bar (694)
253.perlbmk peak result bar (694)
254.gap 1100 147    746     147    746     254.gap base result bar (746)
254.gap peak result bar (746)
255.vortex 1900 152    1246      152    1246      255.vortex base result bar (1246)
255.vortex peak result bar (1246)
256.bzip2 1500 173    868     173    868     256.bzip2 base result bar (868)
256.bzip2 peak result bar (868)
300.twolf 3000 292    1027      291    1031      300.twolf base result bar (1027)
300.twolf peak result bar (1031)
SPECint_base2000 790      
  SPECint2000 814      

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM eServer pSeries 690 Turbo
CPU: POWER4
CPU MHz: 1300
FPU: Integrated
CPU(s) enabled: 1 core, 8 chips, 2 cores/chip, 4 chips/MCM
CPU(s) orderable: 2,3,4 MCMs (order by # MCM)
Parallel: None
Primary Cache: 64KBI+32KBD (on chip) per core
Secondary Cache: 1440KB unified (on chip) per chip
L3 Cache: 128MB unified (off Chip)
Other Cache: None
Memory: 32GB
Disk Subsystem: 2x18GB 10000RPM
Other Hardware: None
Software
Operating System: AIX 5L V5.1
Compiler: C: IBM VAC for AIX 6.0 BETA invoked as cc except where noted as xlc
C++: IBM VAC++ for AIX 6.0 BETA invoked as xlC
File System: AIX/JFS
System State: Multi-user
Notes / Tuning Information 
 Portability Flags:
   gcc: -ma -qlanglvl=ansi -DHOST_WORDS_BIG_ENDIAN
   crafty:  -DAIX
   eon:     -DNEED_EXPLICIT_SPECIALIZATION
   perlbmk: -DSPEC_CPU2000_AIX
   gap:     -DSYS_IS_BSD -DSYS_STRING_H -DSYS_HAS_TIME_PROTO -DSYS_HAS_MALLOC_PROTO
            -DSYS_HAS_CALLOC_PROTO
   twolf:   -DHAVE_SIGNED_CHAR
 Base Optimization Flags:
   C:   -qpdf1/pdf2 -O5 -lhmu -qalign=natural
   C++: -qpdf1/pdf2 -O5 -lhmu -qalign=natural
 Peak Optimization Flags
   164.gzip:    CC=/usr/vac/bin/xlc, -O4 -qpdf1/pdf2
   175.vpr:     -O4 -qarch=ppc -qtune=pwr3, fdpr -v -R3
   176.gcc:     basepeak=1
   181.mcf:     -O3 -lhmu  -qipa=partition=large, fdpr -v -R3
   186.crafty:  -O4 -q64, fdpr -v -R3
   197.parser:  -O5, fdpr -v -R3
   252.eon:     basepeak=1
   253.perlbmk: basepeak=1
   254.gap:     basepeak=1
   255.vortex:  basepeak=1
   256.bzip2:   basepeak=1
   300.twolf:   CC=/usr/vac/bin/xlc, -O5 -qpdf1/pdf2 -lhmu  -qalign=natural
 fdpr: Feedback directed program restructuring tool
 APAR IY 22854 was applied to AIX 5L V5.1 to enable new hardware support.
 The final version of the beta compiler will be available by Dec-2002.

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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 08-Nov-2001

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