SPEC OMPM2001 Summary SGI SGI Altix 3000 (1500MHz, Itanium 2) Thu Jun 3 13:36:10 2004 SPEC License #HPG0014 Tester: SGI Test date: Jun-2004 Test Site: SGI Hardware availability: Jun-2003 Software availability: May-2004 Base Base Base Peak Peak Peak Benchmarks Ref Time Run Time Ratio Ref Time Run Time Ratio ------------- -------- -------- -------- -------- -------- -------- 310.wupwise_m 6000 148 40558* 6000 148 40558* 310.wupwise_m 6000 147 40784 6000 147 40784 312.swim_m 6000 84.5 71024* 6000 84.5 71024* 312.swim_m 6000 84.2 71287 6000 84.2 71287 314.mgrid_m 7300 146 49960 7300 146 49960 314.mgrid_m 7300 146 49931* 7300 146 49931* 316.applu_m 4000 100 39955 4000 100 39955 316.applu_m 4000 101 39780* 4000 101 39780* 318.galgel_m 5100 440 11580 5100 417 12242* 318.galgel_m 5100 441 11559* 5100 404 12633 320.equake_m 2600 119 21796* 2600 89.8 28947* 320.equake_m 2600 117 22179 2600 89.6 29026 324.apsi_m 3400 142 23938* 3400 124 27406 324.apsi_m 3400 141 24069 3400 124 27393* 326.gafort_m 8700 472 18451 8700 391 22246 326.gafort_m 8700 472 18446* 8700 391 22223* 328.fma3d_m 4600 232 19863 4600 190 24208 328.fma3d_m 4600 233 19769* 4600 190 24178* 330.art_m 6400 87.3 73320 6400 87.3 73320 330.art_m 6400 87.4 73243* 6400 87.4 73243* 332.ammp_m 7000 558 12544 7000 558 12544 332.ammp_m 7000 559 12520* 7000 559 12520* ======================================================================== 310.wupwise_m 6000 148 40558* 6000 148 40558* 312.swim_m 6000 84.5 71024* 6000 84.5 71024* 314.mgrid_m 7300 146 49931* 7300 146 49931* 316.applu_m 4000 101 39780* 4000 101 39780* 318.galgel_m 5100 441 11559* 5100 417 12242* 320.equake_m 2600 119 21796* 2600 89.8 28947* 324.apsi_m 3400 142 23938* 3400 124 27393* 326.gafort_m 8700 472 18446* 8700 391 22223* 328.fma3d_m 4600 233 19769* 4600 190 24178* 330.art_m 6400 87.4 73243* 6400 87.4 73243* 332.ammp_m 7000 559 12520* 7000 559 12520* SPECompMbase2001 28853 SPECompMpeak2001 31210 HARDWARE -------- Hardware Vendor: SGI Model Name: SGI Altix 3000 (1500MHz, Itanium 2) CPU: Intel Itanium 2 CPU MHz: 1500 FPU: Integrated CPU(s) enabled: 32 cores, 32 chips, 1 core/chip CPU(s) orderable: 4-256 Primary Cache: 16KBI + 16KBD (on chip) per core Secondary Cache: 256KB (on chip) per core L3 Cache: 6.0MB (on chip) per core Other Cache: N/A Memory: 128 GB (32*512MB PC2700 DIMMS per 4 core module) Disk Subsystem: 1 x 36 GB SCSI (Seagate Cheetah 15k rpm) Other Hardware: None SOFTWARE -------- OpenMP Threads: 32 Parallel: OpenMP Operating System: SGI ProPack(TM) 3 Compiler: Intel(R) Fortran Compiler for Linux 8.0 (Build 20040519) Intel(R) C++ Compiler for Linux 8.0 (Build 20040519) File System: xfs System State: Multi-user NOTES ----- Baseline optimization flags: C programs: -openmp -O3 -ipo -ansi -ansi_alias -auto_ilp32 (ONESTEP) Fortran programs: -openmp -O3 -ipo (ONESTEP) OpenMP runtime library libguide.a statically linked Portability Flags: 318.galgel_m: -FI -132 Extra Flags: 330.art_m: -DINTS_PER_CACHELINE=32 -DDBLS_PER_CACHELINE=16 Baseline user environment: OMP_NUM_THREADS 32 limit stacksize 64000 KMP_STACKSIZE 31M KMP_LIBRARY TURNAROUND OMP_DYNAMIC FALSE KMP_SCHEDULE static,balanced Peak optimization flags: 310.wupwise_m: basepeak=true 312.swim_m: basepeak=true 314.mgrid_m: basepeak=true 316.applu_m: basepeak=true 318.galgel_m: -openmp -O3 -ipo (ONESTEP) OMP_NUM_THREADS=16 320.equake_m: -openmp -O3 -ipo -ansi -ansi_alias -auto_ilp32 (ONESTEP) 324.apsi_m: -openmp -O3 -ipo (ONESTEP) 326.gafort_m: -openmp -O3 -ipo (ONESTEP) 328.fma3d_m: -openmp -O3 -ipo (ONESTEP) 330.art_m: basepeak=true 332.ammp_m: basepeak=true Alternate sources: Add critical region around update of linked list in parallel loop. Approved src.alt available as ompm-purdue1-20040324.tar.gz Used for 330.art_m, base and peak. Peak sources: SPEC OMPL2001 source for 64bit systems modified for SPEC OMPM2001. Available as ompl src.alt in SPEC OMP v3.0 Used for 320.equake_m, 324.apsi_m, 326.gafort_m, and 328.fma3d_m. For all benchmarks threads were bound to cores using the following submit command: dplace -x2 -cNTM1,0 $command, where NTM1 is the number of threads minus 1. This binds threads in order of creation, beginning with the master thread on core NTM1, the first slave thread on core NTM1-1, and so on. The -x2 flag instructs dplace to skip placement of the lightweight OpenMP monitor thread, which is created prior to the slave threads. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 1999-2002 Standard Performance Evaluation Corporation Generated on Wed Jun 23 11:07:13 2004 by SPEC OMP2001 ASCII formatter v2.1