SPEC CPU2017 software OS and BIOS Settings Descriptions for xFusion Platform systems

Operating System Tuning Parameters

Cpufreq setting

"cpupower frequency-set" provides a simplified mechanism to adjust processor frequencies when cpu frequency scaling is enabled in the OS. See the cpupower-frequency-set man page for details.Here is a brief description of options used in the config file. By default, settings are applied to all logical cpus in the system.Frequencies can be passed in Hz, kHz (default), MHz, GHz, or THz by postfixing the value with the desired unit name, without any space. Available frequencies and governors can be determined with "cpupower frequency-info".

tuned-adm

The 'tuned' provides a number of predefined profiles for typical use cases. The 'tuned-adm' command is used to change settings of the tuned daemon. The tuned-adm command can query current settings, list available profiles, recommend a tuning profile for the system, change profiles directly, or turn off tuning.

throughput-performance: For typical throughput performance tuning. Disables power saving mechanisms and enables sysctl settings that improve the throughput performance of disk and network I/O. CPU governor is set to performance and CPU energy performance bias is set to performance. Disk readahead values are increased.

latency-performance: For low latency performance tuning. Disables power saving mechanisms. CPU governor is set to performance and locked to the low C states. CPU energy performance bias to performance.

balanced: Default profile provides balanced power saving and performance. It enables CPU and disk plugins of tuned and makes the conservative governor is active and also sets the CPU energy performance bias to normal. It also enables power saving on audio and graphics card.

powersave: Maximal power saving for whole system. It sets the CPU governor to ondemand governor and energy performance bias to powersave. It also enable power saving on USB, SATA, audio and graphics card.

accelerator-performance: Throughput performance based tuning with disabled higher latency STOP states.

desktop: Optimize for the desktop use-case.

hpc-compute: Optimize for HPC compute workloads.

intel-sst: Configure for Intel Speed Select Base Frequency.

network-latency: Optimize for deterministic performance at the cost of increased power consumption, focused on low latency network performance.

network-throughput: Optimize for streaming network throughput, generally only necessary on older CPUs or 40G+ networks.

optimize-serial-console: Optimize for serial console use.

virtual-guest: Optimize for running inside a virtual guest.

virtual-host: Optimize for running KVM guests.


Firmware / BIOS / Microcode Settings

Hardware Prefetcher (Default = Enabled)

This BIOS option allows the enabling/disabling of a processor mechanism to prefetch data into the cache according to a pattern-recognition algorithm In some cases, setting this option to Disabled may improve performance. Users should only disable this option after performing application benchmarking to verify improved performance in their environment.

Turbo Mode (Default = Enabled)

Intel Turbo boost Technology, Enabling this option allows the processor cores to automatically increase its frequency and increasing performance if it is running below power, temperature.

Enable LP [Global] (Default = Enabled)

The Intel Hyper-Threading knob has been renamed Enable LP [Global] to represent the number of logical processors (LP). Enabling this option allows to use processor resources more efficiently, enabling multiple threads to run on each core and increases processor throughput, improving overall performance on threaded software.

Single LP: Run a single logical processor per core.

Performance Profile (Default = Custom)

Values for this BIOS setting can be: Custom: Allows the user to setup all of the BIOS options according to their requirement. Performance: Maximize the performance of the server. Efficiency: Maximize the power efficiency of the server. Load Balance: The system's performance and power consumption will be adjusted automatically according to the loading.

CPU C6 Report (Default = Disabled)

Enable or disable reporting of the CPU C6 State (ACPI C3) to the OS.

Enhanced Halt State (C1E) (Default = Disabled)

When set to Enabled, the processor is allowed to switch to nimimum performance and save power when idle.

Sub NUMA Cluster(SNC)(Default = Disabled)

Sub NUMA Clustering (SNC) is a feature for breaking up the LLC into disjoint clusters based on address range,with each cluster bound to a subset of the memory controllers in the system.It improves average latency to the LLC.

Values for this BIOS option can be:

Disabled: SNC disabled will support 1-cluster and 4-way IMC interleave.

Enable SNC2 (2-clusters): SNC2 Enabled supports 2-clusters SNC and 2-way IMC interleave.

Enable SNC4 (4-clusters): SNC2 Enabled supports 4-clusters SNC and 1-way IMC interleave.

Last Level Cache (LLC) Prefetch (Default = Enabled)

The last level cache (LLC) prefetch is a prefetcher added to the Intel Xeon Scalable processor family as a result of the non-inclusive cache architecture. The LLC prefetcher is an additional prefetch mechanism on top of the existing prefetchers that prefetch data into the core Data Cache Unit (DCU) and Mid-Level Cache (MLC or second-level cache (L2)). Enabling LLC prefetch gives the core prefetcher the ability to prefetch data directly into the LLC without necessarily filling into the L1 and L2 cache. In some cases, setting this option to disabled can improve performance.

Values for this BIOS option can be:

Disabled: Disables the LLC prefetcher. The other core prefetchers are unaffected.

Enabled: Gives the core prefetcher the ability to prefetch data directly to the LLC.

Adaptive Double Device Data Correction (ADDDC) Sparing (Default = Enabled)

Adaptive Double Device Data Correction (ADDDC), which is an enhanced feature to DDDC. This function is used to correct data errors on two memory particles, ADDDC still has single-particle multi-bit error correction capability after the first particle failure occurs and is replaced.

Values for this BIOS option can be:

Enabled: Enable the ADDDC Sparing function.

Disabled: Disable the ADDDC Sparing function.