SPEC® CINT2006 Result

Cisco Systems

Cisco UCS C460 M1 (Intel Xeon E7540, 2.00 GHz)

Hardware
CPU Name:	Intel Xeon E7540
CPU Characteristics:	Intel Turbo Boost Technology up to 2.26 GHz
CPU MHz:	2000
FPU:	Integrated
CPU(s) enabled:	24 cores, 4 chips, 6 cores/chip, 2 threads/core
CPU(s) orderable:	1,2,3,4 chips
Primary Cache:	32 KB I + 32 KB D on chip per core
Secondary Cache:	256 KB I+D on chip per core
L3 Cache:	18 MB I+D on chip per chip
Other Cache:	None
Memory:	512 GB (64 x 8 GB 4Rx4 PC3-8500R, ECC)
Disk Subsystem:	146 GB SAS, 15K RPM
Other Hardware:	None

Software
Operating System:	SuSe Linux Enterprise Server 11 (x86_64), Kernel 2.6.27-19-5-default
Compiler:	Intel C++ Professional Compiler for IA32 and Intel 64, Version 11.1 Build 20091130 Package ID: l_cproc_p_11.1.064
Auto Parallel:	No
File System:	ext3
System State:	Run level 3 (multi-user)
Base Pointers:	32-bit
Peak Pointers:	32/64-bit
Other Software:	MicroQuill SmartHeap Library V8.1

Results Table

Benchmark	Base							Peak
Benchmark	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio	Copies	Seconds	Ratio	Seconds	Ratio	Seconds	Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench	48	1140	411	1146	409	1142	410	48	964	486	963	487	979	479
401.bzip2	48	1462	317	1452	319	1456	318	48	1381	335	1381	335	1376	337
403.gcc	48	927	417	935	413	928	416	48	938	412	939	412	937	413
429.mcf	48	730	600	721	607	724	604	48	719	609	716	612	720	608
445.gobmk	48	1048	481	1045	482	1043	483	48	958	525	957	526	961	524
456.hmmer	48	737	607	738	607	739	606	48	646	693	649	690	646	693
458.sjeng	48	1310	443	1308	444	1307	445	48	1190	488	1188	489	1192	487
462.libquantum	48	609	1630	611	1630	609	1630	48	612	1620	612	1620	613	1620
464.h264ref	48	1691	628	1719	618	1704	623	48	1713	620	1693	628	1693	627
471.omnetpp	48	845	355	845	355	846	355	48	764	392	764	393	764	393
473.astar	48	1046	322	1047	322	1045	322	48	929	363	931	362	931	362
483.xalancbmk	48	600	552	599	553	600	552	48	600	552	599	553	600	552

The config file option 'submit' was used.
 numactl was used to bind copies to the cores

ulimit -s unlimited was used to set the stacksize to unlimited prior to run

Binaries were compiled on SLES 10 with Binutils 2.18.50.0.7.20080502

icc -m32

icpc -m32

-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch

403.gcc:

	icpc -m32
473.astar:	icpc -m64

400.perlbench:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -ansi-alias
401.bzip2:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -opt-prefetch -ansi-alias -auto-ilp32
403.gcc:	-xSSE4.2 -ipo -O3 -no-prec-div -static
429.mcf:	-xSSE4.2 -ipo -O3 -no-prec-div -static -opt-prefetch
445.gobmk:	-xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -O2 -ipo -no-prec-div -ansi-alias
456.hmmer:	-xSSE4.2 -ipo -O3 -no-prec-div -static -unroll2 -ansi-alias -auto-ilp32
458.sjeng:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32
462.libquantum:	-xSSE4.2 -ipo -O3 -no-prec-div -static -auto-ilp32 -opt-prefetch
464.h264ref:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -static(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias

471.omnetpp:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-32bit -lsmartheap
473.astar:	-xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=routine -Wl,-z,muldefs -L/home/cmplr/usr3/alrahate/cpu2006.1.1.ic11.1/libic11.1-64bit -lsmartheap64
483.xalancbmk:	basepeak = yes

403.gcc:

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic11.1-linux64-revE.20100316.xml.