SPEC® CINT2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

IBM Corporation

IBM System x3550 (Intel Xeon L5410)

SPECint®_rate2006 = Not Run

CPU2006 license: 11 Test date: Oct-2008
Test sponsor: IBM Corporation Hardware Availability: Nov-2008
Tested by: IBM Corporation Software Availability: Nov-2008
Benchmark results graph
Hardware
CPU Name: Intel Xeon L5410
CPU Characteristics: 1333MHz system bus
CPU MHz: 2333
FPU: Integrated
CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip
CPU(s) orderable: 1,2 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 12 MB I+D on chip per chip, 6 MB shared / 2 cores
L3 Cache: None
Other Cache: None
Memory: 16 GB (8 x 2 GB DDR2-5300F ECC)
Disk Subsystem: 1 x 36 GB SAS, 15000 RPM
Other Hardware: None
Software
Operating System: SuSE Linux Enterprise Server 10 (x86_64) SP1,
Kernel 2.6.16.46-0.12-smp
Compiler: Intel C++ Compiler 11.0 for Linux
Build 20080730 Package ID: l_cproc_b_11.0.042
Auto Parallel: No
File System: ReiserFS
System State: Run level 3 (multi-user)
Base Pointers: 32-bit
Peak Pointers: Not Applicable
Other Software: Microquill SmartHeap V8.1
Binutils 2.18.50.0.7.20080502

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 8 614 127   611 128   607 129  
401.bzip2 8 880 87.7 907 85.1 888 86.9
403.gcc 8 692 93.1 695 92.7 695 92.7
429.mcf 8 716 102   715 102   716 102  
445.gobmk 8 692 121   693 121   692 121  
456.hmmer 8 620 120   620 120   619 121  
458.sjeng 8 764 127   764 127   766 126  
462.libquantum 8 861 192   862 192   862 192  
464.h264ref 8 859 206   859 206   859 206  
471.omnetpp 8 708 70.6 711 70.3 709 70.5
473.astar 8 796 70.6 799 70.3 798 70.4
483.xalancbmk 8 490 113   490 113   490 113  

Submit Notes

The config file option 'submit' was used.
 taskset was used to bind processes to cores

General Notes

 Hardware Prefetch Disabled, Adjacent Sector Prefetch Disabled
 'ulimit -s unlimited' was used to set the stack size to unlimited prior to run

Base Compiler Invocation

C benchmarks:

 icc 

C++ benchmarks:

 icpc 

Base Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -xSSE4.1   -ipo   -O3   -no-prec-div   -static   -inline-calloc   -opt-malloc-options=3   -opt-prefetch 

C++ benchmarks:

 -xSSE4.1   -ipo   -O3   -no-prec-div   -opt-prefetch   -Wl,-z,muldefs   -L/spec/cpu2006.1.1/lib -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic11.0-int-linux64-revA.20090713.11.html,
http://www.spec.org/cpu2006/flags/Intel-Linux64-Platform.20090713.03.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic11.0-int-linux64-revA.20090713.11.xml,
http://www.spec.org/cpu2006/flags/Intel-Linux64-Platform.20090713.03.xml.

SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders.

For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2014 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.1.
Report generated on Tue Jul 22 20:20:07 2014 by SPEC CPU2006 HTML formatter v6932.
Originally published on 11 November 2008.