SPEC® CINT2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

Fujitsu Siemens Computers

PRIMERGY RX200 S4, Intel Xeon L5420, 2.50 GHz

SPECint®_rate2006 = Not Run

CPU2006 license: 22 Test date: Feb-2008
Test sponsor: Fujitsu Siemens Computers Hardware Availability: Mar-2008
Tested by: Fujitsu Siemens Computers Software Availability: Nov-2007
Benchmark results graph
Hardware
CPU Name: Intel Xeon L5420
CPU Characteristics: 1333 MHz system bus
CPU MHz: 2500
FPU: Integrated
CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip
CPU(s) orderable: 1,2 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 12 MB I+D on chip per chip, 6 MB shared / 2 cores
L3 Cache: None
Other Cache: None
Memory: 16 GB (8x2 GB PC2-5300F, 2 rank, CAS 5-5-5, with
ECC)
Disk Subsystem: Seagate ST973451SS (SAS, 73GB, 15000rpm)
Other Hardware: None
Software
Operating System: SUSE Linux Enterprise Server 10 (x86_64) SP1,
Kernel 2.6.16.46-0.12-smp
Compiler: Intel C++ Compiler for Linux32 and Linux64
Version 10.1 - Build 20070725
Auto Parallel: No
File System: ext2
System State: Multiuser, Runlevel 3
Base Pointers: 32-bit
Peak Pointers: Not Applicable
Other Software: MicroQuill SmartHeap Library, Version 8.1
binutils-2.17.tar.gz, Version 2.17

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 8 623 125   620 126   627 125  
401.bzip2 8 871 88.7 885 87.2 871 88.7
403.gcc 8 715 90.1 717 89.8 715 90.1
429.mcf 8 920 79.3 920 79.3 917 79.6
445.gobmk 8 665 126   666 126   664 126  
456.hmmer 8 725 103   726 103   725 103  
458.sjeng 8 797 121   797 121   798 121  
462.libquantum 8 3262 50.8 3262 50.8 3261 50.8
464.h264ref 8 854 207   855 207   854 207  
471.omnetpp 8 725 69.0 726 68.9 735 68.1
473.astar 8 759 74.0 765 73.4 764 73.5
483.xalancbmk 8 472 117   471 117   471 117  

General Notes


 This result has been produced with binaries provided and compiled by Intel.

 BIOS configuration:
 Hardware Prefetch = Disable, Adjacent Sector Prefetch = Disable

 For information about Fujitsu Siemens Computers please see:
 http://www.fujitsu-siemens.com

Base Compiler Invocation

C benchmarks:

 icc 

C++ benchmarks:

 icpc 

Base Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -fast   -inline-calloc   -opt-malloc-options=3 

C++ benchmarks:

 -xT   -ipo   -O3   -no-prec-div   -Wl,-z,muldefs   -L/home/cmplr/usr3/alrahate/cpu2006.1.0/lib -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags file that was used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic10.1-INT-ia32-linux-flags.20090714.04.html.

You can also download the XML flags source by saving the following link:
http://www.spec.org/cpu2006/flags/Intel-ic10.1-INT-ia32-linux-flags.20090714.04.xml.

SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders.

For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright 2006-2014 Standard Performance Evaluation Corporation
Tested with SPEC CPU2006 v1.0.
Report generated on Tue Jul 22 15:44:02 2014 by SPEC CPU2006 HTML formatter v6932.
Originally published on 5 March 2008.