SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Unisys Corporation
Unisys ES7000 ARIES 520 (3.0GHz Xeon MP)
SPECint_rate2000 = 88.4  
SPECint_rate_base2000 = 82.1  
SPEC license # 15 Tested by: Unisys Corporation Test date: Mar-2004 Hardware Avail: Apr-2004 Software Avail: Mar-2004
Graph Scale Benchmark Base
Copies
Base
Runtime
Base
Ratio
Copies Runtime Ratio
164.gzip base result bar (76.1)
164.gzip peak result bar (78.4)
164.gzip 8 171    76.1   8 166    78.4  
175.vpr base result bar (56.9)
175.vpr peak result bar (63.9)
175.vpr 8 229    56.9   8 203    63.9  
176.gcc base result bar (102)
176.gcc peak result bar (102)
176.gcc 8 99.7  102     8 99.7  102    
181.mcf base result bar (48.8)
181.mcf peak result bar (50.3)
181.mcf 8 342    48.8   8 332    50.3  
186.crafty base result bar (99.3)
186.crafty peak result bar (106)
186.crafty 8 93.4  99.3   8 87.1  106    
197.parser base result bar (101)
197.parser peak result bar (108)
197.parser 8 165    101     8 154    108    
252.eon base result bar (118)
252.eon peak result bar (144)
252.eon 8 102    118     8 83.8  144    
253.perlbmk base result bar (93.2)
253.perlbmk peak result bar (117)
253.perlbmk 8 179    93.2   8 143    117    
254.gap base result bar (32.3)
254.gap peak result bar (32.3)
254.gap 8 316    32.3   8 316    32.3  
255.vortex base result bar (93.7)
255.vortex peak result bar (107)
255.vortex 8 188    93.7   8 165    107    
256.bzip2 base result bar (95.8)
256.bzip2 peak result bar (95.8)
256.bzip2 8 145    95.8   8 145    95.8  
300.twolf base result bar (136)
300.twolf peak result bar (138)
300.twolf 8 204    136     8 202    138    
  SPECint_rate_base2000 82.1    
  SPECint_rate2000 88.4  

Hardware
Hardware Vendor: Unisys Corporation
Model Name: Unisys ES7000 ARIES 520 (3.0GHz Xeon MP)
CPU: Intel Xeon MP (400MHz system bus)
CPU MHz: 3000
FPU: Integrated
CPU(s) enabled: 8 cores, 8 chips, 1 core/chip(HT Technology disabled)
CPU(s) orderable: 8,12,16
Parallel: No
Primary Cache: 12K(I) micro-ops+8KBD on chip
Secondary Cache: 512KB(I+D) on chip
L3 Cache: 4096KB(I+D) on chip
Other Cache: 32MB L4 Cache off chip per 4 CPUs
Memory: 4GB
Disk Subsystem: 2X36GB SCSI RAID0 DISKs (15K rpm each)
Other Hardware:
Software
Operating System: MS Windows 2003 Datacenter Edition Build 3790
Compiler: Intel C++ Compiler 7.1 Build 20031229Z
Microsoft .NET Visual 7.0.9466 (for libraries)
SmartHeap Library Version 7.1
File System: NTFS
System State: Default
Notes / Tuning Information
 +FDO: PASS1=-Qprof_gen  PASS2=-Qprof_use
 Base tuning for C programs  : -Qxi -Qipo -Qfp_port
 Base tuning for C++ programs: -QxW -Qipo -GX -GR
 Portability flags:
 176.gcc: -Dalloca=_alloca /F10000000
 186.crafy: -DNT_i386
 253.perlbmk: -DSPEC_CPU2000_NTOS -DPERLDLL /MT
 254.gap: -DSYS_HAS_CALLOC_PROTO -DSYS_HAS_MALLOC_PROTO
 Peak tuning:
 164.gzip:     -QxW -Qipo -Oa -Oi- +FDO 
 175.vpr:      -QxW -Qipo     -O3  +FDO 
 176.gcc:      basepeak=yes
 181.mcf:      -QxW -Qipo     -O3 +FDO
 186.crafty:   -QxW -Qipo -Oa -O3 +FDO  
 197.parser:   -QxW -Qipo     -O3 +FDO
 252.eon:      -QxW -Qipo     -O3 +FDO
 253.perlbmk:  -QxW -Qipo     -O3 +FDO shlW32M.lib
 254.gap:      basepeak=yes
 255.vortex    -QxW -Qipo     -O3 +FDO 
 256.bzip2:    basepeak=yes
 300.twolf:    -QxW -Qipo     -O3 +FDO shlW32M.lib

 Enabled two user settings in the BIOS :
 1."Adjacent Sector Prefetch"
 2."Prefetch Queue"
 HT Technology disabled through Unisys Sentinel System Management Product


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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 04-May-2004

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