SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Hewlett-Packard Company
HP Integrity Superdome 32-way (1500 MHz Itanium 2)
SPECint_rate2000 = 453    
SPECint_rate_base2000 = 453    
SPEC license # 3 Tested by: HP Richardson Test date: Sep-2003 Hardware Avail: Oct-2003 Software Avail: Sep-2003
Graph Scale Benchmark Base
Copies
Base
Runtime
Base
Ratio
Copies Runtime Ratio
164.gzip base result bar (341)
164.gzip peak result bar (341)
164.gzip 32 153    341     32 153    341    
175.vpr base result bar (388)
175.vpr peak result bar (388)
175.vpr 32 134    388     32 134    388    
176.gcc base result bar (524)
176.gcc peak result bar (524)
176.gcc 32 78.0  524     32 78.0  524    
181.mcf base result bar (635)
181.mcf peak result bar (635)
181.mcf 32 105    635     32 105    635    
186.crafty base result bar (435)
186.crafty peak result bar (435)
186.crafty 32 85.3  435     32 85.3  435    
197.parser base result bar (351)
197.parser peak result bar (351)
197.parser 32 190    351     32 190    351    
252.eon base result bar (558)
252.eon peak result bar (558)
252.eon 32 86.5  558     32 86.5  558    
253.perlbmk base result bar (434)
253.perlbmk peak result bar (434)
253.perlbmk 32 154    434     32 154    434    
254.gap base result bar (318)
254.gap peak result bar (318)
254.gap 32 128    318     32 128    318    
255.vortex base result bar (682)
255.vortex peak result bar (682)
255.vortex 32 103    682     32 103    682    
256.bzip2 base result bar (442)
256.bzip2 peak result bar (442)
256.bzip2 32 126    442     32 126    442    
300.twolf base result bar (476)
300.twolf peak result bar (476)
300.twolf 32 234    476     32 234    476    
  SPECint_rate_base2000 453      
  SPECint_rate2000 453    

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: HP Integrity Superdome 32-way (1500 MHz Itanium 2)
CPU: Intel Itanium 2
CPU MHz: 1500
FPU: Integrated
CPU(s) enabled: 32 cores, 32 chips, 1 core/chip
CPU(s) orderable: 6 to 32 by 2
Parallel: no
Primary Cache: 16KBI + 16KBD (on chip) per CPU
Secondary Cache: 256KB (on chip) per CPU
L3 Cache: 6.0MB (on chip) per CPU
Other Cache: N/A
Memory: 128GB (256 * 512MB DIMMs)
Disk Subsystem: 10x36GB 10K RPM SCSI disk (striped)
Other Hardware: N/A
Software
Operating System: HPUX11i-TCOE B.11.23
Compiler: HP C/ANSI C Compiler B.11.23
HP aC++ Compiler B.11.23
File System: hfs
System State: Multi-user
Notes / Tuning Information
 Portability Flags
 176.gcc     : -DHOST_WORDS_BIG_ENDIAN
 186.crafty  : -DHP
 252.eon     : -DFMAX_IS_DOUBLE 
 253.perlbmk : -DSPEC_CPU2000_HP
 254.gap     : -DSPEC_CPU2000_HP -DSYS_IS_USG -DSYS_HAS_IOCTL_PROTO
               -DSYS_HAS_TIME_PROTO -DSYS_HAS_CALLOC_PROTO
 
 Base Flags
   all       : +Oprofile=collect:all/+Oprofile=use
   C         : +Ofaster -exec +Odatalayout
   C++       : +Ofaster +inline_level 2 -minshared 
 
 Peak Flags
   same as baseline (basepeak=true set globally)

 Kernel Tunables:
   dbc_max_pct=20
   dbc_min_pct=20
   maxdsiz=3221225472
   maxssiz=401604608
   maxdsiz_64bit=4396972769279
   maxssiz_64bit=1073741824
   vps_pagesize=4096
   vps_ceiling=16384

 Notes:

   System was configured with 1/2 of memory interleaved and
     1/2 of memory local to each cell

   System configured as a single partition with 8 cells and 
     4 processors per cell

   Processes were assigned to localities using the
     HP-UX mpsched utility

   Filesystem used for spec runs mounted fs_async
 


For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 07-Oct-2003

Generated on Wed Apr 13 13:15:57 2005 by SPEC CPU2000 HTML formatter v1.01