SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Hewlett-Packard Company
HP Integrity Superdome 64-way (1500 MHz Itanium 2)
SPECint_rate2000 = 904    
SPECint_rate_base2000 = 904    
SPEC license # 3 Tested by: HP Richardson Test date: Aug-2003 Hardware Avail: Oct-2003 Software Avail: Sep-2003
Graph Scale Benchmark Base
Copies		 Base
Runtime		 Base
Ratio		 Copies Runtime Ratio
164.gzip base result bar (701)
164.gzip peak result bar (701)		 164.gzip 64 148    701     64 148    701    
175.vpr base result bar (778)
175.vpr peak result bar (778)		 175.vpr 64 134    778     64 134    778    
176.gcc base result bar (1013)
176.gcc peak result bar (1013)		 176.gcc 64 80.6  1013      64 80.6  1013     
181.mcf base result bar (1255)
181.mcf peak result bar (1255)		 181.mcf 64 106    1255      64 106    1255     
186.crafty base result bar (895)
186.crafty peak result bar (895)		 186.crafty 64 83.0  895     64 83.0  895    
197.parser base result bar (710)
197.parser peak result bar (710)		 197.parser 64 188    710     64 188    710    
252.eon base result bar (1108)
252.eon peak result bar (1108)		 252.eon 64 87.1  1108      64 87.1  1108     
253.perlbmk base result bar (859)
253.perlbmk peak result bar (859)		 253.perlbmk 64 156    859     64 156    859    
254.gap base result bar (636)
254.gap peak result bar (636)		 254.gap 64 128    636     64 128    636    
255.vortex base result bar (1349)
255.vortex peak result bar (1349)		 255.vortex 64 105    1349      64 105    1349     
256.bzip2 base result bar (884)
256.bzip2 peak result bar (884)		 256.bzip2 64 126    884     64 126    884    
300.twolf base result bar (936)
300.twolf peak result bar (936)		 300.twolf 64 238    936     64 238    936    
  SPECint_rate_base2000 904      
  SPECint_rate2000 904    

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: HP Integrity Superdome 64-way (1500 MHz Itanium 2)
CPU: Intel Itanium 2
CPU MHz: 1500
FPU: Integrated
CPU(s) enabled: 64 cores, 64 chips, 1 core/chip
CPU(s) orderable: 6 to 64 by 2
Parallel: no
Primary Cache: 16KBI + 16KBD (on chip) per CPU
Secondary Cache: 256KB (on chip) per CPU
L3 Cache: 6.0MB (on chip) per CPU
Other Cache: N/A
Memory: 256GB (512 * 512MB DIMMs)
Disk Subsystem: 2x36GB 10K rpm SCSI (striped)
Other Hardware: N/A
Software
Operating System: HPUX11i-TCOE B.11.23
Compiler: HP C/ANSI C Compiler B.11.23
HP aC++ Compiler B.11.23
File System: hfs
System State: Multi-user
Notes / Tuning Information 
 Portability Flags
 176.gcc     : -DHOST_WORDS_BIG_ENDIAN
 186.crafty  : -DHP
 252.eon     : -DFMAX_IS_DOUBLE 
 253.perlbmk : -DSPEC_CPU2000_HP
 254.gap     : -DSPEC_CPU2000_HP -DSYS_IS_USG -DSYS_HAS_IOCTL_PROTO
               -DSYS_HAS_TIME_PROTO -DSYS_HAS_CALLOC_PROTO
 
 Base Flags
   all       : +Oprofile=collect:all/+Oprofile=use
   C         : +Ofaster -exec +Odatalayout
   C++       : +Ofaster +inline_level 2 -minshared 
 
 Peak Flags
   same as baseline (basepeak=true set globally)

 Kernel Tunables:
   dbc_max_pct=20
   dbc_min_pct=20
   maxdsiz=3221225472
   maxssiz=401604608
   maxdsiz_64bit=4396972769279
   maxssiz_64bit=1073741824
   vps_pagesize=4096
   vps_ceiling=16384

 Notes:

   System was configured with 1/2 of memory interleaved and
     1/2 of memory local to each cell

   System configured as a single partition with 16 cells and 
     4 processors per cell

   Processes were assigned to localities using the
     HP-UX mpsched utility

   Filesystem used for SPEC runs mounted behind,fs_async

For questions about this result, please contact the tester.
For other inquiries, please contact webmaster@spec.org
Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 26-Aug-2003

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