SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
IBM Corporation
IBM eServer pSeries 690 HPC (1300 MHz, 16 CPU)
SPECint_rate2000 = 149    
SPECint_rate_base2000 = 144    
SPEC license # 11 Tested by: IBM, Austin, TX Test date: Jun-2002 Hardware Avail: Dec-2001 Software Avail: Sep-2002
Graph Scale Benchmark Base
Copies		 Base
Runtime		 Base
Ratio		 Copies Runtime Ratio
164.gzip base result bar (109)
164.gzip peak result bar (109)		 164.gzip 16 239    109     16 239    109    
175.vpr base result bar (139)
175.vpr peak result bar (139)		 175.vpr 16 186    139     16 186    139    
176.gcc base result bar (141)
176.gcc peak result bar (143)		 176.gcc 16 144    141     16 143    143    
181.mcf base result bar (176)
181.mcf peak result bar (178)		 181.mcf 16 190    176     16 188    178    
186.crafty base result bar (128)
186.crafty peak result bar (157)		 186.crafty 16 145    128     16 118    157    
197.parser base result bar (83.8)
197.parser peak result bar (83.8)		 197.parser 16 399    83.8   16 399    83.8  
252.eon base result bar (189)
252.eon peak result bar (189)		 252.eon 16 128    189     16 128    189    
253.perlbmk base result bar (113)
253.perlbmk peak result bar (128)		 253.perlbmk 16 296    113     16 261    128    
254.gap base result bar (144)
254.gap peak result bar (144)		 254.gap 16 142    144     16 142    144    
255.vortex base result bar (225)
255.vortex peak result bar (237)		 255.vortex 16 157    225     16 149    237    
256.bzip2 base result bar (153)
256.bzip2 peak result bar (153)		 256.bzip2 16 182    153     16 182    153    
300.twolf base result bar (186)
300.twolf peak result bar (190)		 300.twolf 16 300    186     16 294    190    
  SPECint_rate_base2000 144      
  SPECint_rate2000 149    

Hardware
Hardware Vendor: IBM Corporation
Model Name: IBM eServer pSeries 690 HPC (1300 MHz, 16 CPU)
CPU: POWER4
CPU MHz: 1300
FPU: Integrated
CPU(s) enabled: 16 cores, 16 chips, 1 core/chip, 4 chips/MCM
CPU(s) orderable: 8,16 (order by # cores)
Parallel: No
Primary Cache: 64KBI+32KBD (on chip) per core
Secondary Cache: 1440KB unified (on chip) per chip
L3 Cache: 128MB unified (off-chip) per MCM, 4 MCMs in SUT (4 chips per MCM)
Other Cache: None
Memory: 128 GB
Disk Subsystem: 1X16GB 1X8GB
Other Hardware: None
Software
Operating System: AIX 5L V5.1
Compiler: IBM VisualAge C for AIX,
Version 6.0
IBM VisualAge C++ for AIX,
Version 6.0
File System: AIX/JFS
System State: Multi-User
Notes / Tuning Information 
 Portability Flags:
   gcc:     -ma -DHOST_WORDS_BIG_ENDIAN
   crafty:  -DAIX
   eon:     -DNEED_EXPLICIT_SPECIALIZATION
             -I. -DNDEBUG
   perlbmk: -DSPEC_CPU2000_AIX
   gap:     -DSYS_IS_BSD -DSYS_STRING_H -DSYS_HAS_TIME_PROTO
            -DSYS_HAS_MALLOC_PROTO -DSYS_HAS_CALLOC_PROTO
   twolf:   -DHAVE_SIGNED_CHAR

 Base Optimization Flags:
   C:
   -qpdf1/pdf2 
   -O5 -blpdata -qalign=natural
   C++:
   -qpdf1/pdf2 
   -O5 -lhmu -qalign=natural

 Integer Peak Optimization Flags
 164.gzip 
   BASEPEAK = 1
 175.vpr 
   BASEPEAK = 1
 176.gcc 
   -qpdf1/pdf2 
   -O5 -lhmu -qalign=natural
 181.mcf 
   fdpr -v -R3
   -O3 -lhmu -qipa=partition=large -blpdata
 186.crafty 
   fdpr -v -R3
   -O4 -q64
 197.parser 
   BASEPEAK = 1
 252.eon 
   BASEPEAK = 1
 253.perlbmk 
   -qpdf1/pdf2 
   -O5 -lhmu -qalign=natural
 254.gap 
   BASEPEAK = 1
 255.vortex 
   -qpdf1/pdf2 
   -O5 -lhmu -qalign=natural
 256.bzip2 
   BASEPEAK = 1
 300.twolf 
   -qpdf1/pdf2 
   -O5 -lhmu -qalign=natural -blpdata

   fpdr: Feedback directed program restructuring tool.
   /usr/spec2000 filesystem mounted with no JFS log file I/O.
   APAR IY 28102 was applied to AIX to enable new hardware support.
   ulimits set to unlimited.
   C: IBM VAC++ invoked as cc except where noted as xlc.
   C++: IBM VAC++ invoked as xlC.
   Large page mode and memory affinity were set as follows:
   vmtune -g 16777216 -L 1024 -y1

 MCM = Multi-chip Module
 SUT = System under Test

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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 16-Jul-2002

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